1. Field of the Invention
The invention relates to a method of forming a metal pattern on a dielectric substrate coated with a layer of metal, preferably with a copper film.
2. Brief Description of the Related Art
In the past, many different methods of producing circuit patterns on electric circuit carriers have been proposed. In the panel plating process, a layer of copper that completely covers the drilled printed circuit board material is first produced in the thickness required for the circuit structures. Then, those regions of the outer sides of the printed circuit boards are covered with a layer of resist that correspond to the circuit structures to be formed so that these regions are protected during the subsequent etching process, thus being preserved. In the pattern plating process but a thin copper film is at first formed on the printed circuit board material. A layer of photoresist is for example applied there onto and the copper film is led bare again by photostructuring at the places that correspond to the circuit structures to be formed. A layer of galvanoresist is applied to the bare copper regions. Then, the layer of photoresist is removed and the bare copper film is removed by etching, the layer of galvanoresist protecting the layer of metal located underneath against the etching agent. In the subcase of the metal resist process, a layer of metal resist, a layer of terne metal for example, is applied as a galvanoresist layer.
These methods and other known methods present considerable disadvantages. More specifically, it is not possible to manufacture under manufacturing conditions circuit structures of widths of less than 100 xcexcm in a reproducible way. Numerous attempts have been made to achieve this goal. With the help of some complicated methods and basic materials, such circuits could finally be produced. Such methods however are not suited for mass production since they are too expensive and complex and/or require very expensive basic materials. These methods are not suited to produce circuits with lines having a structure width of less than 50 micrometers though.
DE-A-18 113 77 discloses a method of manufacturing printed circuit boards with circuit lines applied on both sides thereof, in which an etch resist layer, more specifically a layer of tin, is exclusively applied to the copper film in the bores of the printed circuit boards that have been contacted through and in which the desired delineation pattern is made by etching. For this purpose, the outer sides of the boards are provided with a layer of varnish extending as far as the brinks of the bores prior to applying the etch resist layer.
DE 37 32 249 A1 indicates a method of manufacturing three-dimensional printed circuit boards in subtractive/semi-additive technique with image transmission on an insulating substrate in which the substrate coated with a copper film is at first coated all over with a tin metal resist that may be electroless plated and/or electrolytically deposited and the metal resist is then selectively exposed to laser irradiation without using a mask so that the circuit pattern created is a negative. The copper regions that have been laid bare may then be removed by etching.
EP 0 062 300 A2 also describes a method of producing printed circuit boards in which one copper film is applied on at least one side of a plastic substrate, the circuit pattern being then formed in the copper film in that a metallic etch resist layer is deposited onto the copper film, the etch resist layer being selectively evaporated according to the desired circuit pattern by means of a laser beam and the remaining copper film being removed by etching as far as the surface of the plastic substrate at the places removed by way of the laser treatment.
In Derwent Abstracts to JP-A-59227186 a method is outlined in which a photoresist is applied to the outer sides only of a printed circuit board that has been contacted through, then a metallic layer of etch resist, among others of solder metal or tin, is deposited on the walls of the bores, whereupon the photoresist with the delineation pattern is exposed to light and developed prior to finally removing by etching the copper that has been laid bare.
EP 0 757 885 B1 indicates a method of forming metallic circuit patterns on electrically isolating substrates in which at first a layer of metal is applied to the substrate prior to applying thereupon an organic protective layer with an electrophoretic dip coat. Then. , the protective layer is removed in the regions of the circuit patterns to be formed by means of laser irradiation. An etch resistant layer of metal is deposited onto the metal surface that has been laid bare. Then, the organic protective layer is cleared off in the regions adjacent the future circuit pattern by means of laser irradiation and the layer of metal that has been laid bare is also removed in these regions by means of an etching process. Laser irradiation is generated by an Nd-YAG-laser.
DE 41 31 065 A1 discloses still another method of manufacturing printed circuit boards, in which at first a layer of metal and then a metallic or an organic layer of etch resist is applied onto a substrate. It suggests using as a metallic layer of etch resist a layer of an alloy of tin or of terne metal and as an organic layer of etch resist a layer that may be produced by electrophoretic enameling or electrostatic coating. In the regions directly adjacent the future circuit pattern, the layer of etch resist is then removed by etching by means of electromagnetic irradiation, by means of laser irradiation for example, in such a way that the circuit pattern and islands of the layer of metal that are electrically isolated from the pattern by etching grooves remain on the substrate. Laser irradiation is generated by an Nd-YAG-laser. The document indicates that etching grooves of 150 xcexcm width are produced with this method, the undercut of the layers of metal on each flank of the etching grooves amounting to 35 xcexcm.
EP 0 469 635 A1 also describes a method of producing printed circuit boards in which a layer of metal and then an organic layer of etch resist are applied onto a substrate. The organic etch resist layer used is an electrophoretic dip coating. Subsequently, the layer of etch resist in the regions directly adjacent the future circuit pattern is cleared off by way of an Nd-YAG-laser and the thus laid bare layer of metal is removed by etching.
EP 0 489 560 A1 describes a composition of resin for forming a positive photoresist which is used as an anaphoretic varnish for manufacturing printed circuit boards. The resin composition is obtained by copolymerization of the following compounds: a) acrylic acid and methacrylic acid, b) compounds that are unstable in acids, for example tert.-butyl acrylate and tert.-butyl methacrylate and also c) a polymerizable monomer with which a homopolymer can be obtained that has a glass transition temperature Tg of 0xc2x0 C. or less, e.g. ethyl acrylate, iso-propyl acrylate, n-propyl acrylate, iso-butyl acrylate, 2-ethyl hexyl acrylate, n-hexyl methacrylate, n-octyl methacrylate and n-decyl methacrylate. The resist also contains a photoacid generator, e.g. a phosphonium, sulphonium, diazonium and iodonium salt. For structuring, the resist is exposed to light and developed, the regions being altered by the exposure in such a way that they are soluble in the processing solution.
The known methods either are extremely sophisticated and thus expensive or it is not possible to manufacture very fine structures with a width of 50 xcexcm and less in a reproducible way. The only known possibility to produce such fine structures consists in starting from a material being provided with a copper film of no more than 5 xcexcm thick. But it is extraordinarily complicated and thus expensive to manufacture such materials with this process. In using the customary materials with a thick copper film (usually 17 xcexcm), it has been found that, on account of considerable undercut, the circuit structures often have no rectangular section, so that the area with which they rest on the substrate is very small, the desired adhesion of the circuit lines being not achieved as a result thereof.
In using the method described in DE 37 32 249 A1, it has been found that, even after laser ablation, considerable amounts of tin are still to be found on those regions of the copper surfaces that have previously been freed from tin so that the subsequent etching result obtained is not satisfactory. More specifically when manufacturing circuit carriers with circuit lines having structure widths of less than 50 xcexcm, no reproducible results may be obtained. The shape and width of the circuit lines varies over wide limits. In parts, either the spaces between the circuit lines are interconnected or the circuit lines are disrupted. Sometimes, pitting-like etchings of the circuit pattern were observed after the copper film had been removed by etching.
Additionally, the circuit patterns produced with this method often create problems in subsequent processes, when a solder resist mask is being formed for example, and in processes in which the end layers deposited are layer combinations of nickel/gold. In the first case, the adhesion of the mask to the circuit structures is not sufficient and in the second case, the copper structures that have been freed from the layer of tin cannot perfectly be etched to form the layer of nickel/gold.
The methods in which an etch resist layer is made with an electro dip coat and in which said layer is structured with an Nd-YAG-laser by selectively allowing the layer of varnish to evaporate, also present difficulties, since in this case too, unreproducible residues are formed that may deposit again onto the already laid bare metal surfaces. If, for structuring metallic layers, a conventional method is utilized in which photosensitive layers are deposited onto the metallic surface, an additional step in development is necessary. Moreover, these resists and the substrates coated with said resists are difficult to manipulate because it is not evident to use them in daylight. It has been found that the known electrophoretic photoresist systems do not readily permit error-free resolution of finest structures.
The basic problem of the present invention is therefore avoiding the disadvantages of the known methods and finding more specifically a method that makes it possible to readily and, most of all, very quickly, carry out structuring which may also be performed in mass production and that permits to reproducibly manufacture finest structures with structure widths of 50 xcexcm and less. Furthermore, the problems experienced with the known methods with regard to the capability of further processing the finished circuit patterns are not to occur. The shape of the circuit lines too is to be reproducible and is to come the nearest possible to a rectangular section.
The problem is solved by the method according to claim 1. Preferred embodiments of the invention are indicated in the subordinate claims.